This invention relates to the field of joined-together but possibly dissimilar substrate-received integrated circuit devices, for example to devices showing one component of the optical type and additional components of the electrical type.
Assembly of electronic circuit components from the dissimilar semiconductor materials that are often required for e.g. a combined optical and electronic systems, i.e. for optoelectronic systems onto a common circuit substrate has traditionally been achieved through hybrid integration procedures wherein component elements from different semiconductor materials are collected individually side by side onto a common dielectric substrate. This process which involves handling individual subelements (i.e. circuit die) is expensive and time consuming and precludes benefits such as the optimum reduction of parasitic distances between components. The alignment distances and metallization thickness used in such an assembly are in fact quite crude as compared to those realizable with photolithographic techniques, which can realize submicron features. Hence circuit performance in such hybrid devices are fundamentally limited.
Recently attempts have been made to monolithically integrate these circuits through the growth of dissimilar materials onto a common substrate, such as by growing Indium Phosphide or Gallium Arsenide semiconductor layers onto a Silicon substrate. These attempts have been hampered however by fundamental crystallographic differences in the materials, differences which severely limit achieved device quality. Although this type of monolithic integration promises to become a technique of choice once growth capabilities are advanced, a presently achievable technique is here disclosed for achievement of this opto-electronic and other circuit integrations. The patent of E. S. Kolesar Jr., U.S. Pat. No. 5,008,213, discloses the use of epoxy materials in the fabrication of multiple die sourced electronic circuit devices. Both this patent and the reference patents cited for the examination of this patent are believed to be of background interest with respect to the present invention.
This reference does not, however, disclose the full wafer marriage of possible dissimilar material-based electronic circuit die and the use of, substrate-removed, see through alignment techniques to achieve this marriage as is accomplished in the present invention.